As this is the 25th edition of FPL, we are pleased to have a special session focussing on the past and especially on the next 25 years of field-programmable technology. This session will contain seven talks from key industrial players.
|Date||Wednesday 2 September 2015|
|Time||14:00 – 17:00|
|Location||Royal Institution Theatre|
Philip Leong (University of Sydney, AU)
14:00 – 14:20
Reconfiguring the Datacentre: Building the Infrastructure for Enterprise-class FPGAs
Salem Derisavi (Huawei)
With the recent exploitation of FPGAs in datacentres, FPGA adoption is on the rise for enterprise and cloud applications and many challenges remain to deploy reconfigurable logic to the production datacentre. Identifying a tractable FPGA application has traditionally required addressing the three Ps: price, power and performance. A fourth P (programming) has recently enabled financials and hyperscales to evaluate reconfigurable acceleration through high-level languages such as OpenCL. The next challenge for the FPGA community is the infrastructure: how do we virtualise an FPGA? How can we program and manage a virtualised FPGA? How should an FPGA appear to a YARN scheduler? Should it matter if an FPGA is used as a co-processor or in a disaggregated fashion? In this talk, we will explore the many new opportunities in making FPGAs cloud-ready and why these challenges must be addressed as a community.
14:20 – 14:40
From Data to Information to Flow
Oskar Mencer (Maxeler)
14:40 – 15:00
Early Reconfigurable Computing and the Changing Technological Landscape
Mark Shand (Google)
25 years ago the PAM project at the DEC Paris Research Laboratory did pioneering work in the emerging field of reconfigurable computing. This talk surveys the PAM project with focus on the technological context it and follow-on projects operated in and highlights the impact of evolving technology on the positioning of reconfigurable computing.
15:40 – 16:00
The Impact of System-on-Chips on Your Design Methods
Rieny Rijnen (Topic Products)
The fact that FPGA vendors have started integrating processors with FPGA fabric into system-on-chips leads to further need for integration of both hardware and software development. Shorter time-to-market and raising complexity put a higher demand on the abstraction level of design methods and tools. In this presentation, Topic will zoom in on how they approach this challenge.
16:00 – 16:20
The Future: Not What it Used to Be
John Watson (Micron)
The early vision of reconfigurable computing has not been realised. This does not mean it will not happen, only that the timeframe was wrong. Today, many trends point directly toward its inevitability. Unfortunately, we may be heading somewhere we should not be going. Sometimes, seeing the future is not a good thing.
16:20 – 16:40
Gateware-defined Networking (GDN) Goes Mainstream
John Lockwood (Algo-Logic)
Gateware-defined Networking (GDN) enables datacentres to scale up performance of critical networking functions. Algorithms implemented in logic achieve the lowest latency and jitter for electronic trading by offloading order processing to gateware. The added benefit of power savings will drive FPGAs to large-scale deployments in datacentres.
16:40 – 17:00
The Golden Age of FPGAs
Kubilay Atasu (IBM)
FPGAs are becoming integral components of datacentre architectures because of their energy and space efficiency advantages. The (near) end of semiconductor technology scaling has made this shift inevitable, and I argue that the real enablers of such a historical shift are the recent advances in programming languages and programming tools.